\hypertarget{group__i2s__api}{
\section{I2s\_\-api}
\label{group__i2s__api}\index{I2s\_\-api@{I2s\_\-api}}
}
\subsection*{Functions}
\begin{DoxyCompactItemize}
\item 
void \hyperlink{group__i2s__api_ga0ba9afb63790d0bcfbf04edcc2308fe7}{I2STxEnable} (unsigned long ulBase)
\item 
void \hyperlink{group__i2s__api_gaaa29037a92baa2e25621c9f974e80b77}{I2STxDisable} (unsigned long ulBase)
\item 
void \hyperlink{group__i2s__api_gaccacbe532bfa110c86f193908e2da82b}{I2STxDataPut} (unsigned long ulBase, unsigned long ulData)
\item 
long \hyperlink{group__i2s__api_ga5ff02909f31131e7516e1a4518cd4d1d}{I2STxDataPutNonBlocking} (unsigned long ulBase, unsigned long ulData)
\item 
void \hyperlink{group__i2s__api_ga3eeff66f4a414836f10738d6e917f671}{I2STxConfigSet} (unsigned long ulBase, unsigned long ulConfig)
\item 
void \hyperlink{group__i2s__api_gaa0909b0295360243f4d7628b5e61549b}{I2STxFIFOLimitSet} (unsigned long ulBase, unsigned long ulLevel)
\item 
unsigned long \hyperlink{group__i2s__api_gafd8d8948dfcee5ee7fe1358c86b46021}{I2STxFIFOLimitGet} (unsigned long ulBase)
\item 
unsigned long \hyperlink{group__i2s__api_ga3e9d7069c07514b1044390424b41a162}{I2STxFIFOLevelGet} (unsigned long ulBase)
\item 
void \hyperlink{group__i2s__api_ga87ae42c63c3b7c5139fef4212e8eac32}{I2SRxEnable} (unsigned long ulBase)
\item 
void \hyperlink{group__i2s__api_gaea9bd23698a4d521dd3289323f2f8de6}{I2SRxDisable} (unsigned long ulBase)
\item 
void \hyperlink{group__i2s__api_ga7653badc2bf9bf1bc343101f60fa53b5}{I2SRxDataGet} (unsigned long ulBase, unsigned long $\ast$pulData)
\item 
long \hyperlink{group__i2s__api_ga91e192715598705235aa0f77bf8b5505}{I2SRxDataGetNonBlocking} (unsigned long ulBase, unsigned long $\ast$pulData)
\item 
void \hyperlink{group__i2s__api_ga9ccadcabcb0f2b14ee8e3842b26f3d54}{I2SRxConfigSet} (unsigned long ulBase, unsigned long ulConfig)
\item 
void \hyperlink{group__i2s__api_ga786bfb416fd0f20c511fd43ef1686b9f}{I2SRxFIFOLimitSet} (unsigned long ulBase, unsigned long ulLevel)
\item 
unsigned long \hyperlink{group__i2s__api_ga415f2fadd4e0e3d529a242b0d1430634}{I2SRxFIFOLimitGet} (unsigned long ulBase)
\item 
unsigned long \hyperlink{group__i2s__api_gaae8b6074095d3e1c02b5ccc681e7f1d2}{I2SRxFIFOLevelGet} (unsigned long ulBase)
\item 
void \hyperlink{group__i2s__api_gae747a5649ec1c0a6fad6900f431e7409}{I2STxRxEnable} (unsigned long ulBase)
\item 
void \hyperlink{group__i2s__api_ga7ce451df6fa81a07d400f45304448f0b}{I2STxRxDisable} (unsigned long ulBase)
\item 
void \hyperlink{group__i2s__api_gaa4e5277ac0008531a31fec9153119a47}{I2STxRxConfigSet} (unsigned long ulBase, unsigned long ulConfig)
\item 
void \hyperlink{group__i2s__api_ga8810648bccac72b4f12c9e6b18af1e9b}{I2SMasterClockSelect} (unsigned long ulBase, unsigned long ulMClock)
\item 
void \hyperlink{group__i2s__api_ga409c5aa6fb3762d82d9ec039ca875c9f}{I2SIntEnable} (unsigned long ulBase, unsigned long ulIntFlags)
\item 
void \hyperlink{group__i2s__api_ga1e2b2c16a258afc87fcd1188f87f8fc0}{I2SIntDisable} (unsigned long ulBase, unsigned long ulIntFlags)
\item 
unsigned long \hyperlink{group__i2s__api_ga51fb53a2c1ecb4557f1306e67b105099}{I2SIntStatus} (unsigned long ulBase, tBoolean bMasked)
\item 
void \hyperlink{group__i2s__api_gae531df7ee8e1fa505930af50c7ab4f0f}{I2SIntClear} (unsigned long ulBase, unsigned long ulIntFlags)
\item 
void \hyperlink{group__i2s__api_gab35a3b338978d5800dc5331589200d78}{I2SIntRegister} (unsigned long ulBase, void($\ast$pfnHandler)(void))
\item 
void \hyperlink{group__i2s__api_ga4c57ca4b30df09ec3fcbccc889110323}{I2SIntUnregister} (unsigned long ulBase)
\end{DoxyCompactItemize}


\subsection{Function Documentation}
\hypertarget{group__i2s__api_gae531df7ee8e1fa505930af50c7ab4f0f}{
\index{i2s\_\-api@{i2s\_\-api}!I2SIntClear@{I2SIntClear}}
\index{I2SIntClear@{I2SIntClear}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SIntClear}]{\setlength{\rightskip}{0pt plus 5cm}void I2SIntClear (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{unsigned long}]{ ulIntFlags}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_gae531df7ee8e1fa505930af50c7ab4f0f}
Clears pending I2S interrupt sources.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em ulIntFlags}]is a bit mask of the interrupt sources to be cleared.\end{DoxyParams}
This function clears the specified pending I2S interrupts. This must be done in the interrupt handler to keep the handler from being called again immediately upon exit. The {\itshape ulIntFlags\/} parameter can be the logical OR of any of the following values: {\bfseries I2S\_\-INT\_\-RXERR}, {\bfseries I2S\_\-INT\_\-RXREQ}, {\bfseries I2S\_\-INT\_\-TXERR}, or {\bfseries I2S\_\-INT\_\-TXREQ}.

\begin{DoxyNote}{Note}
Since there is a write buffer in the Cortex-\/M3 processor, it may take several clock cycles before the interrupt source is actually cleared. Therefore, it is recommended that the interrupt source be cleared early in the interrupt handler (as opposed to the very last action) to avoid returning from the interrupt handler before the interrupt source is actually cleared. Failure to do so may result in the interrupt handler being immediately reentered (since NVIC still sees the interrupt source asserted).
\end{DoxyNote}
\begin{DoxyReturn}{Returns}
Returns None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga1e2b2c16a258afc87fcd1188f87f8fc0}{
\index{i2s\_\-api@{i2s\_\-api}!I2SIntDisable@{I2SIntDisable}}
\index{I2SIntDisable@{I2SIntDisable}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SIntDisable}]{\setlength{\rightskip}{0pt plus 5cm}void I2SIntDisable (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{unsigned long}]{ ulIntFlags}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga1e2b2c16a258afc87fcd1188f87f8fc0}
Disables I2S interrupt sources.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em ulIntFlags}]is a bit mask of the interrupt sources to be disabled.\end{DoxyParams}
This function disables the specified I2S sources for interrupt generation. The {\itshape ulIntFlags\/} parameter can be the logical OR of any of the following values: {\bfseries I2S\_\-INT\_\-RXERR}, {\bfseries I2S\_\-INT\_\-RXREQ}, {\bfseries I2S\_\-INT\_\-TXERR}, or {\bfseries I2S\_\-INT\_\-TXREQ}.

\begin{DoxyReturn}{Returns}
Returns None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga409c5aa6fb3762d82d9ec039ca875c9f}{
\index{i2s\_\-api@{i2s\_\-api}!I2SIntEnable@{I2SIntEnable}}
\index{I2SIntEnable@{I2SIntEnable}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SIntEnable}]{\setlength{\rightskip}{0pt plus 5cm}void I2SIntEnable (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{unsigned long}]{ ulIntFlags}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga409c5aa6fb3762d82d9ec039ca875c9f}
Enables I2S interrupt sources.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em ulIntFlags}]is a bit mask of the interrupt sources to be enabled.\end{DoxyParams}
This function enables the specified I2S sources to generate interrupts. The {\itshape ulIntFlags\/} parameter can be the logical OR of any of the following values:


\begin{DoxyItemize}
\item {\bfseries I2S\_\-INT\_\-RXERR} for receive errors
\item {\bfseries I2S\_\-INT\_\-RXREQ} for receive FIFO service requests
\item {\bfseries I2S\_\-INT\_\-TXERR} for transmit errors
\item {\bfseries I2S\_\-INT\_\-TXREQ} for transmit FIFO service requests
\end{DoxyItemize}

\begin{DoxyReturn}{Returns}
Returns None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_gab35a3b338978d5800dc5331589200d78}{
\index{i2s\_\-api@{i2s\_\-api}!I2SIntRegister@{I2SIntRegister}}
\index{I2SIntRegister@{I2SIntRegister}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SIntRegister}]{\setlength{\rightskip}{0pt plus 5cm}void I2SIntRegister (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{void($\ast$)(void)}]{ pfnHandler}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_gab35a3b338978d5800dc5331589200d78}
Registers an interrupt handler for the I2S controller.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em pfnHandler}]is a pointer to the function to be called when the interrupt is activated.\end{DoxyParams}
This sets and enables the handler to be called when the I2S controller generates an interrupt. Specific I2S interrupts must still be enabled with the \hyperlink{group__i2s__api_ga409c5aa6fb3762d82d9ec039ca875c9f}{I2SIntEnable()} function. It is the responsibility of the interrupt handler to clear any pending interrupts with \hyperlink{group__i2s__api_gae531df7ee8e1fa505930af50c7ab4f0f}{I2SIntClear()}.

\begin{DoxySeeAlso}{See also}
\hyperlink{group__interrupt__api_ga471d00d73ae22faa426c202f608e9c69}{IntRegister()} for important information about registering interrupt handlers.
\end{DoxySeeAlso}
\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga51fb53a2c1ecb4557f1306e67b105099}{
\index{i2s\_\-api@{i2s\_\-api}!I2SIntStatus@{I2SIntStatus}}
\index{I2SIntStatus@{I2SIntStatus}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SIntStatus}]{\setlength{\rightskip}{0pt plus 5cm}unsigned long I2SIntStatus (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{tBoolean}]{ bMasked}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga51fb53a2c1ecb4557f1306e67b105099}
Gets the I2S interrupt status.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em bMasked}]is set {\bfseries true} to get the masked interrupt status, or {\bfseries false} to get the raw interrupt status.\end{DoxyParams}
This function returns the I2S interrupt status. It can return either the raw or masked interrupt status.

\begin{DoxyReturn}{Returns}
Returns the masked or raw I2S interrupt status, as a bit field of any of the following values: {\bfseries I2S\_\-INT\_\-RXERR}, {\bfseries I2S\_\-INT\_\-RXREQ}, {\bfseries I2S\_\-INT\_\-TXERR}, or {\bfseries I2S\_\-INT\_\-TXREQ} 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga4c57ca4b30df09ec3fcbccc889110323}{
\index{i2s\_\-api@{i2s\_\-api}!I2SIntUnregister@{I2SIntUnregister}}
\index{I2SIntUnregister@{I2SIntUnregister}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SIntUnregister}]{\setlength{\rightskip}{0pt plus 5cm}void I2SIntUnregister (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga4c57ca4b30df09ec3fcbccc889110323}
Unregisters an interrupt handler for the I2S controller.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address.\end{DoxyParams}
This function will disable and clear the handler to be called when the I2S interrupt occurs.

\begin{DoxySeeAlso}{See also}
\hyperlink{group__interrupt__api_ga471d00d73ae22faa426c202f608e9c69}{IntRegister()} for important information about registering interrupt handlers.
\end{DoxySeeAlso}
\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga8810648bccac72b4f12c9e6b18af1e9b}{
\index{i2s\_\-api@{i2s\_\-api}!I2SMasterClockSelect@{I2SMasterClockSelect}}
\index{I2SMasterClockSelect@{I2SMasterClockSelect}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SMasterClockSelect}]{\setlength{\rightskip}{0pt plus 5cm}void I2SMasterClockSelect (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{unsigned long}]{ ulMClock}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga8810648bccac72b4f12c9e6b18af1e9b}
Selects the source of the master clock, internal or external.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em ulMClock}]is the logical OR of the master clock configuration choices.\end{DoxyParams}
This function selects whether the master clock is sourced from the device internal PLL, or comes from an external pin. The I2S serial bit clock (SCLK) and left-\/right word clock (LRCLK) are derived from the I2S master clock. The transmit and receive modules can be configured independently. The {\itshape ulMClock\/} parameter is chosen from the following:


\begin{DoxyItemize}
\item one of {\bfseries I2S\_\-TX\_\-MCLK\_\-EXT} or {\bfseries I2S\_\-TX\_\-MCLK\_\-INT} 
\item one of {\bfseries I2S\_\-RX\_\-MCLK\_\-EXT} or {\bfseries I2S\_\-RX\_\-MCLK\_\-INT} 
\end{DoxyItemize}

\begin{DoxyReturn}{Returns}
Returns None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga9ccadcabcb0f2b14ee8e3842b26f3d54}{
\index{i2s\_\-api@{i2s\_\-api}!I2SRxConfigSet@{I2SRxConfigSet}}
\index{I2SRxConfigSet@{I2SRxConfigSet}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SRxConfigSet}]{\setlength{\rightskip}{0pt plus 5cm}void I2SRxConfigSet (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{unsigned long}]{ ulConfig}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga9ccadcabcb0f2b14ee8e3842b26f3d54}
Configures the I2S receive module.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em ulConfig}]is the logical OR of the configuration options.\end{DoxyParams}
This function is used to configure the options for the I2S receive channel. The parameter {\itshape ulConfig\/} is the logical OR of the following options:


\begin{DoxyItemize}
\item {\bfseries I2S\_\-CONFIG\_\-FORMAT\_\-I2S} for standard I2S format, {\bfseries I2S\_\-CONFIG\_\-FORMAT\_\-LEFT\_\-JUST} for left justified format, or {\bfseries I2S\_\-CONFIG\_\-FORMAT\_\-RIGHT\_\-JUST} for right justified format.
\item {\bfseries I2S\_\-CONFIG\_\-SCLK\_\-INVERT} to invert the polarity of the serial bit clock.
\item {\bfseries I2S\_\-CONFIG\_\-MODE\_\-DUAL} for dual channel stereo, {\bfseries I2S\_\-CONFIG\_\-MODE\_\-COMPACT\_\-16} for 16-\/bit compact stereo mode, {\bfseries I2S\_\-CONFIG\_\-MODE\_\-COMPACT\_\-8} for 8-\/bit compact stereo mode, or {\bfseries I2S\_\-CONFIG\_\-MODE\_\-MONO} for single channel mono format.
\item {\bfseries I2S\_\-CONFIG\_\-CLK\_\-MASTER} or {\bfseries I2S\_\-CONFIG\_\-CLK\_\-SLAVE} to select whether the I2S receiver is the clock master or slave.
\item {\bfseries I2S\_\-CONFIG\_\-SAMPLE\_\-SIZE\_\-32}, {\bfseries \_\-24}, {\bfseries \_\-20}, {\bfseries \_\-16}, or {\bfseries \_\-8} to select the number of bits per sample.
\item {\bfseries I2S\_\-CONFIG\_\-WIRE\_\-SIZE\_\-32}, {\bfseries \_\-24}, {\bfseries \_\-20}, {\bfseries \_\-16}, or {\bfseries \_\-8} to select the number of bits per word that are transferred on the data line.
\end{DoxyItemize}

\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga7653badc2bf9bf1bc343101f60fa53b5}{
\index{i2s\_\-api@{i2s\_\-api}!I2SRxDataGet@{I2SRxDataGet}}
\index{I2SRxDataGet@{I2SRxDataGet}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SRxDataGet}]{\setlength{\rightskip}{0pt plus 5cm}void I2SRxDataGet (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{unsigned long $\ast$}]{ pulData}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga7653badc2bf9bf1bc343101f60fa53b5}
Reads data samples from the I2S receive FIFO with blocking.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em pulData}]points to storage for the returned I2S sample data.\end{DoxyParams}
This function reads a single channel sample or combined left-\/right samples from the I2S receive FIFO. The format of the sample is determined by the configuration that was used with the function \hyperlink{group__i2s__api_ga9ccadcabcb0f2b14ee8e3842b26f3d54}{I2SRxConfigSet()}. If the receive mode is I2S\_\-MODE\_\-DUAL\_\-STEREO then the returned value contains either the left or right sample. The left and right sample alternate with each read from the FIFO, left sample first. If the receive mode is I2S\_\-MODE\_\-COMPACT\_\-STEREO\_\-16 or I2S\_\-MODE\_\-COMPACT\_\-STEREO\_\-8, then the returned data contains both the left and right samples. If the receive mode is I2S\_\-MODE\_\-SINGLE\_\-MONO then the returned data contains the single channel sample.

For the compact modes, both the left and right samples are read at the same time. If 16-\/bit compact mode is used, then the least significant 16 bits contain the left sample, and the most significant 16 bits contain the right sample. If 8-\/bit compact mode is used, then the lower 8 bits contain the left sample, and the next 8 bits contain the right sample, with the upper 16 bits unused.

If there is no data in the receive FIFO, then this function will wait in a polling loop until data is available.

\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga91e192715598705235aa0f77bf8b5505}{
\index{i2s\_\-api@{i2s\_\-api}!I2SRxDataGetNonBlocking@{I2SRxDataGetNonBlocking}}
\index{I2SRxDataGetNonBlocking@{I2SRxDataGetNonBlocking}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SRxDataGetNonBlocking}]{\setlength{\rightskip}{0pt plus 5cm}long I2SRxDataGetNonBlocking (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{unsigned long $\ast$}]{ pulData}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga91e192715598705235aa0f77bf8b5505}
Reads data samples from the I2S receive FIFO without blocking.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em pulData}]points to storage for the returned I2S sample data.\end{DoxyParams}
This function reads a single channel sample or combined left-\/right samples from the I2S receive FIFO. The format of the sample is determined by the configuration that was used with the function \hyperlink{group__i2s__api_ga9ccadcabcb0f2b14ee8e3842b26f3d54}{I2SRxConfigSet()}. If the receive mode is I2S\_\-MODE\_\-DUAL\_\-STEREO then the received data contains either the left or right sample. The left and right sample alternate with each read from the FIFO, left sample first. If the receive mode is I2S\_\-MODE\_\-COMPACT\_\-STEREO\_\-16 or I2S\_\-MODE\_\-COMPACT\_\-STEREO\_\-8, then the received data contains both the left and right samples. If the receive mode is I2S\_\-MODE\_\-SINGLE\_\-MONO then the received data contains the single channel sample.

For the compact modes, both the left and right samples are read at the same time. If 16-\/bit compact mode is used, then the least significant 16 bits contain the left sample, and the most significant 16 bits contain the right sample. If 8-\/bit compact mode is used, then the lower 8 bits contain the left sample, and the next 8 bits contain the right sample, with the upper 16 bits unused.

If there is no data in the receive FIFO, then this function will return immediately without reading any data from the FIFO.

\begin{DoxyReturn}{Returns}
The number of elements read from the I2S receive FIFO (1 or 0). 
\end{DoxyReturn}
\hypertarget{group__i2s__api_gaea9bd23698a4d521dd3289323f2f8de6}{
\index{i2s\_\-api@{i2s\_\-api}!I2SRxDisable@{I2SRxDisable}}
\index{I2SRxDisable@{I2SRxDisable}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SRxDisable}]{\setlength{\rightskip}{0pt plus 5cm}void I2SRxDisable (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_gaea9bd23698a4d521dd3289323f2f8de6}
Disables the I2S receive module for operation.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address.\end{DoxyParams}
This function disables the receive module for operation. The module should be disabled before configuration. When the module is disabled, no data will be clocked in regardless of the signals on the I2S interface.

\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga87ae42c63c3b7c5139fef4212e8eac32}{
\index{i2s\_\-api@{i2s\_\-api}!I2SRxEnable@{I2SRxEnable}}
\index{I2SRxEnable@{I2SRxEnable}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SRxEnable}]{\setlength{\rightskip}{0pt plus 5cm}void I2SRxEnable (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga87ae42c63c3b7c5139fef4212e8eac32}
Enables the I2S receive module for operation.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address.\end{DoxyParams}
This function enables the receive module for operation. The module should be enabled after configuration. When the module is disabled, no data will be clocked in regardless of the signals on the I2S interface.

\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_gaae8b6074095d3e1c02b5ccc681e7f1d2}{
\index{i2s\_\-api@{i2s\_\-api}!I2SRxFIFOLevelGet@{I2SRxFIFOLevelGet}}
\index{I2SRxFIFOLevelGet@{I2SRxFIFOLevelGet}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SRxFIFOLevelGet}]{\setlength{\rightskip}{0pt plus 5cm}unsigned long I2SRxFIFOLevelGet (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_gaae8b6074095d3e1c02b5ccc681e7f1d2}
Gets the number of samples in the receive FIFO.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address.\end{DoxyParams}
This function is used to get the number of samples in the receive FIFO. For the purposes of measuring the FIFO level, a left-\/right sample pair counts as 2, whether the mode is dual or compact stereo. When mono mode is used, internally the mono sample is still treated as a sample pair, so a single mono sample counts as 2. Since the FIFO always deals with sample pairs, normally the level will be an even number from 0 to 16. If dual stereo mode is used and only the left sample has been read without reading the matching right sample, then the FIFO level will be an odd value. If the FIFO level is odd, it indicates a left-\/right sample mismatch.

\begin{DoxyReturn}{Returns}
Returns the number of samples in the transmit FIFO, which will normally be an even number. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga415f2fadd4e0e3d529a242b0d1430634}{
\index{i2s\_\-api@{i2s\_\-api}!I2SRxFIFOLimitGet@{I2SRxFIFOLimitGet}}
\index{I2SRxFIFOLimitGet@{I2SRxFIFOLimitGet}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SRxFIFOLimitGet}]{\setlength{\rightskip}{0pt plus 5cm}unsigned long I2SRxFIFOLimitGet (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga415f2fadd4e0e3d529a242b0d1430634}
Gets the current setting of the FIFO service request level.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address.\end{DoxyParams}
This function is used to get the value of the receive FIFO service request level. This value is set using the \hyperlink{group__i2s__api_ga786bfb416fd0f20c511fd43ef1686b9f}{I2SRxFIFOLimitSet()} function.

\begin{DoxyReturn}{Returns}
Returns the current value of the FIFO service request limit. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga786bfb416fd0f20c511fd43ef1686b9f}{
\index{i2s\_\-api@{i2s\_\-api}!I2SRxFIFOLimitSet@{I2SRxFIFOLimitSet}}
\index{I2SRxFIFOLimitSet@{I2SRxFIFOLimitSet}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2SRxFIFOLimitSet}]{\setlength{\rightskip}{0pt plus 5cm}void I2SRxFIFOLimitSet (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{unsigned long}]{ ulLevel}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga786bfb416fd0f20c511fd43ef1686b9f}
Sets the FIFO level at which a service request is generated.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em ulLevel}]is the FIFO service request limit.\end{DoxyParams}
This function is used to set the receive FIFO fullness level at which a service request will occur. The service request is used to generate an interrupt or a DMA transfer request. The receive FIFO will generate a service request when the number of items in the FIFO is greater than the level specified in the {\itshape ulLevel\/} parameter. For example, if {\itshape ulLevel\/} is 4, then a service request will be generated when there are more than 4 samples available in the receive FIFO.

For the purposes of counting the FIFO level, a left-\/right sample pair counts as 2, whether the mode is dual or compact stereo. When mono mode is used, internally the mono sample is still treated as a sample pair, so a single mono sample counts as 2. Since the FIFO always deals with sample pairs, the level must be an even number from 0 to 16. The minimum value is 0, which will cause a service request when there is any data available in the FIFO. The maximum value is 16, which disables the service request (because there cannot be more than 16 items in the FIFO).

\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga3eeff66f4a414836f10738d6e917f671}{
\index{i2s\_\-api@{i2s\_\-api}!I2STxConfigSet@{I2STxConfigSet}}
\index{I2STxConfigSet@{I2STxConfigSet}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2STxConfigSet}]{\setlength{\rightskip}{0pt plus 5cm}void I2STxConfigSet (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{unsigned long}]{ ulConfig}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga3eeff66f4a414836f10738d6e917f671}
Configures the I2S transmit module.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em ulConfig}]is the logical OR of the configuration options.\end{DoxyParams}
This function is used to configure the options for the I2S transmit channel. The parameter {\itshape ulConfig\/} is the logical OR of the following options:


\begin{DoxyItemize}
\item {\bfseries I2S\_\-CONFIG\_\-FORMAT\_\-I2S} for standard I2S format, {\bfseries I2S\_\-CONFIG\_\-FORMAT\_\-LEFT\_\-JUST} for left justified format, or {\bfseries I2S\_\-CONFIG\_\-FORMAT\_\-RIGHT\_\-JUST} for right justified format.
\item {\bfseries I2S\_\-CONFIG\_\-SCLK\_\-INVERT} to invert the polarity of the serial bit clock.
\item {\bfseries I2S\_\-CONFIG\_\-MODE\_\-DUAL} for dual channel stereo, {\bfseries I2S\_\-CONFIG\_\-MODE\_\-COMPACT\_\-16} for 16-\/bit compact stereo mode, {\bfseries I2S\_\-CONFIG\_\-MODE\_\-COMPACT\_\-8} for 8-\/bit compact stereo mode, or {\bfseries I2S\_\-CONFIG\_\-MODE\_\-MONO} for single channel mono format.
\item {\bfseries I2S\_\-CONFIG\_\-CLK\_\-MASTER} or {\bfseries I2S\_\-CONFIG\_\-CLK\_\-SLAVE} to select whether the I2S transmitter is the clock master or slave.
\item {\bfseries I2S\_\-CONFIG\_\-SAMPLE\_\-SIZE\_\-32}, {\bfseries \_\-24}, {\bfseries \_\-20}, {\bfseries \_\-16}, or {\bfseries \_\-8} to select the number of bits per sample.
\item {\bfseries I2S\_\-CONFIG\_\-WIRE\_\-SIZE\_\-32}, {\bfseries \_\-24}, {\bfseries \_\-20}, {\bfseries \_\-16}, or {\bfseries \_\-8} to select the number of bits per word that are transferred on the data line.
\item {\bfseries I2S\_\-CONFIG\_\-EMPTY\_\-ZERO} or {\bfseries I2S\_\-CONFIG\_\-EMPTY\_\-REPEAT} to select whether the module transmits zeroes or repeats the last sample when the FIFO is empty.
\end{DoxyItemize}

\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_gaccacbe532bfa110c86f193908e2da82b}{
\index{i2s\_\-api@{i2s\_\-api}!I2STxDataPut@{I2STxDataPut}}
\index{I2STxDataPut@{I2STxDataPut}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2STxDataPut}]{\setlength{\rightskip}{0pt plus 5cm}void I2STxDataPut (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{unsigned long}]{ ulData}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_gaccacbe532bfa110c86f193908e2da82b}
Writes data samples to the I2S transmit FIFO with blocking.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em ulData}]is the single or dual channel I2S data.\end{DoxyParams}
This function writes a single channel sample or combined left-\/right samples to the I2S transmit FIFO. The format of the sample is determined by the configuration that was used with the function \hyperlink{group__i2s__api_ga3eeff66f4a414836f10738d6e917f671}{I2STxConfigSet()}. If the transmit mode is I2S\_\-MODE\_\-DUAL\_\-STEREO then the {\itshape ulData\/} parameter contains either the left or right sample. The left and right sample alternate with each write to the FIFO, left sample first. If the transmit mode is I2S\_\-MODE\_\-COMPACT\_\-STEREO\_\-16 or I2S\_\-MODE\_\-COMPACT\_\-STEREO\_\-8, then the {\itshape ulData\/} parameter contains both the left and right samples. If the transmit mode is I2S\_\-MODE\_\-SINGLE\_\-MONO then the {\itshape ulData\/} parameter contains the single channel sample.

For the compact modes, both the left and right samples are written at the same time. If 16-\/bit compact mode is used, then the least significant 16 bits contain the left sample, and the most significant 16 bits contain the right sample. If 8-\/bit compact mode is used, then the lower 8 bits contain the left sample, and the next 8 bits contain the right sample, with the upper 16 bits unused.

If there is no room in the transmit FIFO, then this function will wait in a polling loop until the data can be written.

\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga5ff02909f31131e7516e1a4518cd4d1d}{
\index{i2s\_\-api@{i2s\_\-api}!I2STxDataPutNonBlocking@{I2STxDataPutNonBlocking}}
\index{I2STxDataPutNonBlocking@{I2STxDataPutNonBlocking}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2STxDataPutNonBlocking}]{\setlength{\rightskip}{0pt plus 5cm}long I2STxDataPutNonBlocking (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{unsigned long}]{ ulData}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga5ff02909f31131e7516e1a4518cd4d1d}
Writes data samples to the I2S transmit FIFO without blocking.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em ulData}]is the single or dual channel I2S data.\end{DoxyParams}
This function writes a single channel sample or combined left-\/right samples to the I2S transmit FIFO. The format of the sample is determined by the configuration that was used with the function \hyperlink{group__i2s__api_ga3eeff66f4a414836f10738d6e917f671}{I2STxConfigSet()}. If the transmit mode is I2S\_\-MODE\_\-DUAL\_\-STEREO then the {\itshape ulData\/} parameter contains either the left or right sample. The left and right sample alternate with each write to the FIFO, left sample first. If the transmit mode is I2S\_\-MODE\_\-COMPACT\_\-STEREO\_\-16 or I2S\_\-MODE\_\-COMPACT\_\-STEREO\_\-8, then the {\itshape ulData\/} parameter contains both the left and right samples. If the transmit mode is I2S\_\-MODE\_\-SINGLE\_\-MONO then the {\itshape ulData\/} parameter contains the single channel sample.

For the compact modes, both the left and right samples are written at the same time. If 16-\/bit compact mode is used, then the least significant 16 bits contain the left sample, and the most significant 16 bits contain the right sample. If 8-\/bit compact mode is used, then the lower 8 bits contain the left sample, and the next 8 bits contain the right sample, with the upper 16 bits unused.

If there is no room in the transmit FIFO, then this function will return immediately without writing any data to the FIFO.

\begin{DoxyReturn}{Returns}
The number of elements written to the I2S transmit FIFO (1 or 0). 
\end{DoxyReturn}
\hypertarget{group__i2s__api_gaaa29037a92baa2e25621c9f974e80b77}{
\index{i2s\_\-api@{i2s\_\-api}!I2STxDisable@{I2STxDisable}}
\index{I2STxDisable@{I2STxDisable}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2STxDisable}]{\setlength{\rightskip}{0pt plus 5cm}void I2STxDisable (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_gaaa29037a92baa2e25621c9f974e80b77}
Disables the I2S transmit module for operation.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address.\end{DoxyParams}
This function disables the transmit module for operation. The module should be disabled before configuration. When the module is disabled, no data or clocks will be generated on the I2S signals.

\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga0ba9afb63790d0bcfbf04edcc2308fe7}{
\index{i2s\_\-api@{i2s\_\-api}!I2STxEnable@{I2STxEnable}}
\index{I2STxEnable@{I2STxEnable}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2STxEnable}]{\setlength{\rightskip}{0pt plus 5cm}void I2STxEnable (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga0ba9afb63790d0bcfbf04edcc2308fe7}
Enables the I2S transmit module for operation.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address.\end{DoxyParams}
This function enables the transmit module for operation. The module should be enabled after configuration. When the module is disabled, no data or clocks will be generated on the I2S signals.

\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga3e9d7069c07514b1044390424b41a162}{
\index{i2s\_\-api@{i2s\_\-api}!I2STxFIFOLevelGet@{I2STxFIFOLevelGet}}
\index{I2STxFIFOLevelGet@{I2STxFIFOLevelGet}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2STxFIFOLevelGet}]{\setlength{\rightskip}{0pt plus 5cm}unsigned long I2STxFIFOLevelGet (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga3e9d7069c07514b1044390424b41a162}
Gets the number of samples in the transmit FIFO.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address.\end{DoxyParams}
This function is used to get the number of samples in the transmit FIFO. For the purposes of measuring the FIFO level, a left-\/right sample pair counts as 2, whether the mode is dual or compact stereo. When mono mode is used, internally the mono sample is still treated as a sample pair, so a single mono sample counts as 2. Since the FIFO always deals with sample pairs, normally the level will be an even number from 0 to 16. If dual stereo mode is used and only the left sample has been written without the matching right sample, then the FIFO level will be an odd value. If the FIFO level is odd, it indicates a left-\/right sample mismatch.

\begin{DoxyReturn}{Returns}
Returns the number of samples in the transmit FIFO, which will normally be an even number. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_gafd8d8948dfcee5ee7fe1358c86b46021}{
\index{i2s\_\-api@{i2s\_\-api}!I2STxFIFOLimitGet@{I2STxFIFOLimitGet}}
\index{I2STxFIFOLimitGet@{I2STxFIFOLimitGet}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2STxFIFOLimitGet}]{\setlength{\rightskip}{0pt plus 5cm}unsigned long I2STxFIFOLimitGet (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_gafd8d8948dfcee5ee7fe1358c86b46021}
Gets the current setting of the FIFO service request level.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address.\end{DoxyParams}
This function is used to get the value of the transmit FIFO service request level. This value is set using the \hyperlink{group__i2s__api_gaa0909b0295360243f4d7628b5e61549b}{I2STxFIFOLimitSet()} function.

\begin{DoxyReturn}{Returns}
Returns the current value of the FIFO service request limit. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_gaa0909b0295360243f4d7628b5e61549b}{
\index{i2s\_\-api@{i2s\_\-api}!I2STxFIFOLimitSet@{I2STxFIFOLimitSet}}
\index{I2STxFIFOLimitSet@{I2STxFIFOLimitSet}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2STxFIFOLimitSet}]{\setlength{\rightskip}{0pt plus 5cm}void I2STxFIFOLimitSet (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{unsigned long}]{ ulLevel}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_gaa0909b0295360243f4d7628b5e61549b}
Sets the FIFO level at which a service request is generated.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em ulLevel}]is the FIFO service request limit.\end{DoxyParams}
This function is used to set the transmit FIFO fullness level at which a service request will occur. The service request is used to generate an interrupt or a DMA transfer request. The transmit FIFO will generate a service request when the number of items in the FIFO is less than the level specified in the {\itshape ulLevel\/} parameter. For example, if {\itshape ulLevel\/} is 8, then a service request will be generated when there are less than 8 samples remaining in the transmit FIFO.

For the purposes of counting the FIFO level, a left-\/right sample pair counts as 2, whether the mode is dual or compact stereo. When mono mode is used, internally the mono sample is still treated as a sample pair, so a single mono sample counts as 2. Since the FIFO always deals with sample pairs, the level must be an even number from 0 to 16. The maximum value is 16, which will cause a service request when there is any room in the FIFO. The minimum value is 0, which disables the service request.

\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_gaa4e5277ac0008531a31fec9153119a47}{
\index{i2s\_\-api@{i2s\_\-api}!I2STxRxConfigSet@{I2STxRxConfigSet}}
\index{I2STxRxConfigSet@{I2STxRxConfigSet}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2STxRxConfigSet}]{\setlength{\rightskip}{0pt plus 5cm}void I2STxRxConfigSet (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase, }
\item[{unsigned long}]{ ulConfig}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_gaa4e5277ac0008531a31fec9153119a47}
Configures the I2S transmit and receive modules.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address. \item[{\em ulConfig}]is the logical OR of the configuration options.\end{DoxyParams}
This function is used to configure the options for the I2S transmit and receive channels with identical parameters. The parameter {\itshape ulConfig\/} is the logical OR of the following options:


\begin{DoxyItemize}
\item {\bfseries I2S\_\-CONFIG\_\-FORMAT\_\-I2S} for standard I2S format, {\bfseries I2S\_\-CONFIG\_\-FORMAT\_\-LEFT\_\-JUST} for left justified format, or {\bfseries I2S\_\-CONFIG\_\-FORMAT\_\-RIGHT\_\-JUST} for right justified format.
\item {\bfseries I2S\_\-CONFIG\_\-SCLK\_\-INVERT} to invert the polarity of the serial bit clock.
\item {\bfseries I2S\_\-CONFIG\_\-MODE\_\-DUAL} for dual channel stereo, {\bfseries I2S\_\-CONFIG\_\-MODE\_\-COMPACT\_\-16} for 16-\/bit compact stereo mode, {\bfseries I2S\_\-CONFIG\_\-MODE\_\-COMPACT\_\-8} for 8-\/bit compact stereo mode, or {\bfseries I2S\_\-CONFIG\_\-MODE\_\-MONO} for single channel mono format.
\item {\bfseries I2S\_\-CONFIG\_\-CLK\_\-MASTER} or {\bfseries I2S\_\-CONFIG\_\-CLK\_\-SLAVE} to select whether the I2S transmitter is the clock master or slave.
\item {\bfseries I2S\_\-CONFIG\_\-SAMPLE\_\-SIZE\_\-32}, {\bfseries \_\-24}, {\bfseries \_\-20}, {\bfseries \_\-16}, or {\bfseries \_\-8} to select the number of bits per sample.
\item {\bfseries I2S\_\-CONFIG\_\-WIRE\_\-SIZE\_\-32}, {\bfseries \_\-24}, {\bfseries \_\-20}, {\bfseries \_\-16}, or {\bfseries \_\-8} to select the number of bits per word that are transferred on the data line.
\item {\bfseries I2S\_\-CONFIG\_\-EMPTY\_\-ZERO} or {\bfseries I2S\_\-CONFIG\_\-EMPTY\_\-REPEAT} to select whether the module transmits zeroes or repeats the last sample when the FIFO is empty.
\end{DoxyItemize}

\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_ga7ce451df6fa81a07d400f45304448f0b}{
\index{i2s\_\-api@{i2s\_\-api}!I2STxRxDisable@{I2STxRxDisable}}
\index{I2STxRxDisable@{I2STxRxDisable}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2STxRxDisable}]{\setlength{\rightskip}{0pt plus 5cm}void I2STxRxDisable (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_ga7ce451df6fa81a07d400f45304448f0b}
Disables the I2S transmit and receive modules.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address.\end{DoxyParams}
This function simultaneously disables the transmit and receive modules. When the module is disabled, no data or clocks will be generated on the I2S signals.

\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
\hypertarget{group__i2s__api_gae747a5649ec1c0a6fad6900f431e7409}{
\index{i2s\_\-api@{i2s\_\-api}!I2STxRxEnable@{I2STxRxEnable}}
\index{I2STxRxEnable@{I2STxRxEnable}!i2s_api@{i2s\_\-api}}
\subsubsection[{I2STxRxEnable}]{\setlength{\rightskip}{0pt plus 5cm}void I2STxRxEnable (
\begin{DoxyParamCaption}
\item[{unsigned long}]{ ulBase}
\end{DoxyParamCaption}
)}}
\label{group__i2s__api_gae747a5649ec1c0a6fad6900f431e7409}
Enables the I2S transmit and receive modules for operation.


\begin{DoxyParams}{Parameters}
\item[{\em ulBase}]is the I2S module base address.\end{DoxyParams}
This function simultaneously enables the transmit and receive modules for operation, providing a synchronized SCLK and LRCLK. The module should be enabled after configuration. When the module is disabled, no data or clocks will be generated on the I2S signals.

\begin{DoxyReturn}{Returns}
None. 
\end{DoxyReturn}
